Courrier du Savoir scientifique et technique
Volume 14, Numéro 14, Pages 89-94
2014-05-07
Memory Requirements For Hardware Implementation Of The H.264 Encoder Modules
Auteurs : Messaoudi Kamel . Bourennane El-bay . Toumi Salah . Labbani Ouassila .
Résumé
For a hardware implementation of any image processing algorithm, it is necessary to study the input/output of each processing module even before studying the internal architecture of these modules. And that to prepare a simulation platform, with internal and external memory, necessary to load and to prepare the input for the modules. These memories are also used as intermediate component between the different modules to provide the possibility of parallelism. In this work we give the architecture of internal and external memory used by the H.264 encoder in order to develop a simulation platform for processing modules. This platform can be realized in FPGA platform chosen according to the memory requirements.
Mots clés
H.264/AVC encoder, Memory management, Hardware implementation, ML501 platform.
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